The present invention relates generally to integrated circuit device testing techniques and, more particularly to test structures and techniques for high-speed measurement of random variation/yield (sigma) in integrated circuit devices.
In general, variations in device characteristics include “systematic” variations and “random” variations. Systematic variations (or process variation) are variations in a manufacturing process that equally affect some or all N-doped or P-doped elements of a local circuit depending on e.g., the orientation, geometry and/or location of a device. For example, when manufacturing a semiconductor chip, systematic variations in device characteristics can result from variations in mask dimensions (which causes geometry variations), variations in material properties of wafers, resists, etc., variations in the manufacturing equipment and environment (e.g., lens aberrations, flow turbulence, oven temperature, etc.) and variations in process settings (diffusion time, focus, exposure energy, etc.). Systematic variations typically have significant spatial correlations, i.e., circuits/devices that are near each other can be expected to have the same/similar amount of variations due to systematic sources of variation.
In contrast, random variations in device characteristics between devices of a circuit, wafer, chip or lot, are uncorrelated. Random sources of variations, which cause device mismatch between neighboring devices in a circuit, can adversely affect circuit behavior even more drastically than systematic variations in circuits such as SRAM cells and sense amplifiers. Thus, random variations in device characteristics cause significantly more deviation especially in circuit performance of the above mentioned circuits, than systematic variations. Since random variations in device characteristics are uncorrelated, methods for characterizing or modeling such random variation are difficult and inaccurate.
As device features keep scaling down smaller and smaller, the random variation becomes critical since it can directly impact yield. As devices are scaled down creating more variation, statistical characterization of important. However, it is usually time consuming to measure key parameters (e.g., mean and sigma) of the variation and not for in-line measurement. A solid model needs a large sample size and many applications (e.g., drive currents at different bias conditions, resistances, and leakage currents), which makes test time an issue.